Virtual Silicon Technology, Inc. and University of New Mexico announced today that they have completed the development and qualification of a revolutionary new semiconductor technology that will permit high complexity integrated circuits for space applications to be manufactured on commercial CMOS semiconductor processes.
The joint development was sponsored by NASA and supported by a consortium of participants from the aerospace industry. Virtual Silicon has exclusive, worldwide rights to further develop and market a series of advanced, radiation-tolerant ASIC libraries using patented techniques licensed by the University’s Microelectronics Research Center (MRC).
The resulting standard cell design methodology allows much greater design complexity to be achieved while greatly reducing cost by eliminating the current requirement to fabricate parts on dedicated radiation hardened manufacturing processes.
“We are glad that to have partnered with Virtual Silicon in the development of this turnkey technology,” said Dr. Gary Maki, director
of the Institute of Advanced Microelectronics at the University of Mexico. “Their expertise in advanced ASIC libraries and commitment to aggressively deploy the derived products assure our customers’ success while protecting the valuable intellectual property rights of NASA, MRC, and our affiliates.
“Nearly four years of research have paid off for us and for
everyone interested in achieving higher levels of semiconductor design
complexity within costs that are more consistent with commercial
electronics for space applications.”
“We are extremely pleased with the results of our joint efforts
with the MRC,” said Michael Kliment, chief operating officer at
Virtual Silicon. “Together we’ve turned an exciting technology into
real products that enable our government as well as industrial
partners throughout the world to benefit from the many technical and
economic advantages available through use of modern CMOS semiconductor
technologies in space electronics design.”
New Technology Offers Significant Benefits
Prior to this breakthrough, radiation-hardened components for
space flight applications were only available from a very limited
number of specialized foundries.
In addition to being very expensive to operate, these fabrication
sources tend to be several generations behind commercial CMOS
foundries, restricting designs to lower performance, higher power
consumption, and less density than otherwise achievable.
As the commercial demand for CMOS greatly exceeds the demand for
true rad-hard, there are fewer and fewer companies willing to invest
in these specialized fabs. In order to maintain its leadership in
space electronics, NASA has been researching ways to better use
mainstream semiconductor manufacturers.
Compared with radiation-hardened devices, radiation-tolerant
libraries offer space electronics designers a five to ten times
circuit density increase, higher performance at advanced processes
like 0.35- and 0.5-micron, and much lower manufacturing cost at
commercial foundries.
Comprehensive Qualification Process Demonstrates Impressive Results
Under MRC’s leadership, several organizations contributed
specific expertise to the final development, qualification and
deployment of the radiation-tolerant library. Virtual Silicon
developed the Diplomat(tm)-RT standard cell library based on MRC’s
patented radiation-tolerant technology.
MRC implemented 0.35- and 0.5-micron test chips with the library
and Hewlett Packard manufactured the chips via the MOSIS program. The
NASA Goddard Space Flight Center (GSFC), and the Johnson Space Center
have provided overall systems design guidance, as well as library
qualification. Aerospace Corporation provided additional radiation
testing and qualification.
“The RT library is expected to be a significant microelectronics
enabler to create next generation flight electronics which is critical
for future satellite missions,” said Warner Miller advanced
applications group leader at NASA, GSFC. “GSFC has overseen the
development of the RT technology and is utilizing the RT electronics
in current missions. It is beneficial to the government and aerospace
industry to have this technology available commercially.”
The test chips were subjected to rigorous radiation testing at
the Brookhaven National Laboratory’s single event upset test facility
(Tandem Van de-Graaff Accelerator). Both 0.35- and 0.5-micron versions
show very similar encouraging results. No single event latch-up nor
single event upset of storage elements were observed to an LET of 120
MeV/mg/cm2. Effective cross-section of clock edge coincident upsets
captured into storage elements were reduced by one order of magnitude.
The complete results of these tests will be presented at the 7th
NASA Symposium on VLSI Design, being hosted by the MRC at the
University of New Mexico, October 1-2, 1998. Virtual Silicon will
present additional information on the Diplomat-RT library and its
design environment at the symposium.
“We have successfully proven these layout and design techniques
in several test chips and in three full function, rad-tolerant VLSI
processors developed using full custom layout approaches,” reported
Dr. Jody Gambles, overall project manager and recognized pioneer in
radiation-tolerant research. “Combining our experience with Virtual
Silicon’s standard cell design expertise now means huge productivity
gains for our customers via modern ASIC design methodologies.”
New Market Opportunities
“The consortium members are forecasting that the market for
sublicensing this advanced ASIC library could be $10M for each process
generation over the next three years,” added Taylor Scanlon, president
and chief executive officer of Virtual Silicon Technology, Inc. “This
estimate covers the use of the standard cells only.
“There are many opportunities for Virtual Silicon and others to
provide additional physical design elements like memories and IP cores
for space electronics. This is another segment of the growing market
for application-specific, semiconductor intellectual property.”
Guidance for the deployment of the technology is being provided
by The Center for Technology Commercialization located in Westboro,
MA. The licensing with the University of New Mexico has been
administered by the Science and Technology Corporation at UNM.
Initial Product Availability
Virtual Silicon has developed a full standard cell library that
will include design kits for Verilog, Vital, and Synopsys models. With
the front-end design kits, Virtual Silicon will then deploy complete
physical libraries fully interfaced with popular back-end design tools
like those from Cadence. Design kit and physical layout of the
0.5-micron Diplomat-RT50 libraries are now available. The 0.35-micron
Diplomat-RT35 library with more cell functionality will be available
in early 1999.
Meanwhile, MRC plans to establish one or more authorized design
centers to assist users in final layout of radiation-tolerant designs.
The authorized design centers will also provide a means for foreign
firms that might otherwise be restricted from licensing the physical
libraries to have their logical designs instantiated with the physical
layouts, and fabricated in the United States.
About the MRC at the University of New Mexico
The Microelectronics Research Center at the University of New
Mexico was chartered by NASA in 1995. Originated in 1986 as one of
eight national Space Engineering Research Centers (SERC) by NASA, the
Center today is the single research center for NASA whose goal is to
advance the use of VLSI circuits in space-bound electronics.
The Center conducts state-of-the-art research in the fields of
radiation-tolerant semiconductors, low power IC’s, and high
performance electronic system design.
The Center has previously developed 25 VLSI chips for various
NASA missions, including the EDAC at the heart of the Solid State
Recorder installed in the Hubble Space Telescope during the February
97 STS-82 mission of the Space Shuttle Discovery.
The Center works in close cooperation with major electronics
companies to insure the transition of research to practical
implementation, and addresses specific national needs through
interaction with national research laboratories such as the Department
of Defense and the Department of Energy.
About Virtual Silicon
Virtual Silicon Technology develops, markets, and supports
Silicon Ready(tm) libraries, physical design components, and services
for complex integrated circuits in deep submicron semiconductor
process technologies.
The company provides application-specific, process-specific, and
foundry-portable versions of its Diplomat(tm) libraries and “hard” IP
to semiconductor manufacturers and foundries, ASSP designers, and
systems developers who demand the highest quality, maximum
performance, and optimum densities for their semiconductor
innovations.
Working closely with third-party vendors of semiconductor
intellectual property (SIP), Virtual Silicon Technology is
establishing its cell-based technology as the foundation for reuse and
exchange of SIP manufactured at foundries throughout the world.
